Top 50 VLSI Interview Questions for Freshers and Experienced

VLSI Interview Questions for Freshers and Experienced | VLSI Interview Questions And Answers (Expected) | VLSI ECE/EEE VIVA FAQ's

The below VLSI questions are expected in interviews for both freshers and experienced candidates seeking for a job in circuit designing companies. We have collected 50 most expected and frequently asked VLSI interview questions. The questions are from basic level to advanced level.
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VLSI Interview Questions for Freshers

  1. What are Integration Circuits?
  2. What are the differences between SSI, LSI, MSI, and VLSI?
  3. What are Application Specific Integration Circuits(ASIC)?
  4. What are the types of transistors in CMOS?
  5. What are the advantages of using CMOS process?
  6. Define threshold voltage in CMOS?
  7. What are the techniques to minimize the power consumption in CMOS logic?
  8. What is the difference between n-type transistors and p-type transistors?
  9. What is Enhancement mode transistor?
  10. What are the steps involved in twin tub process?
  11. What is Bipolar Complementary Metal Oxide Semiconductor (BICMOS)?
  12. What is a pulldown device?
  13. What is Noise Margin?
  14. What are the different operating regions for a MOS transistor?
  15. What the color coding represents in stick diagram?
  16. What is Body Effect?
  17. What is Latch-up?
  18. What is Verilog?
  19. Why NAND gate is preferred over NOR gate in fabrication?
  20. What happens to delay if you improve load capacitance?
  21. Why is the substrate in NMOS connected to Ground and in PMOS to Vdd?
  22. Why PMOS and NMOS are sized equally in transmission gates?
  23. What happens to delay If you include a resistor at the output of the CMOS circuit?
  24. Explain Gate level modeling, data flow modeling, switch level modeling, and behavioral modeling?
  25. Why do we gradually increase the size of inverters in buffer design?
  26. What are identifiers?
  27. What is electron scattering?
  28. Draw various symbols of the transmission gate?
  29. What is the full custom ASIC design?
  30. What is Field Programmable Gate Array(FPGA)?
  31. What are macros?
  32. What is Interface Design Document Test(IDD test)?
  33. What is metastability and when does it occur?
  34. What are the different ways to reduce metastable state?
  35. Differentiate parallel simulation and concurrent simulation?
  36. What is ad-hoc testing?
  37. What is BILBO(Built-In Logic Block Observer)?
  38. Explain the sizing of inverters?
  39. What is IDDQ (Indefinite Delivery Definite Quantity) testing?
  40. What is a boundary scan?
  41. What happens when PMOS and NMOS are interchanged in a CMOS inverter?
  42. How the dynamic gate works?
  43. What are the advantages and disadvantages of synchronous and asynchronous resets?
  44. How does the Fanout concept help CMOS gates?
  45. What are the different type of Adder circuits you know?
  46. How the Binary Counter works?
  47. How many transistors are required in CMOS to implement a NAND Gate?
  48. What is the use of a tri-state bus?
  49. What is the difference between latches and flip-flops based designs?
  50. What type of measures are needed to reduce the manufacturing flaws?

1 comment:

Игорь Юрьевич Подольский said...

A collection of VLSI/ASIC logic design interview questions, partially documented at really taken interviews, partially designed based on the commonly asked questions and usually touched issues is at https://vlsiquestions.wixsite.com/vlsiquestions.

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